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Self-Checking and Fault-Tolerant Digital Design

by Parag K. Lala

  • ISBN: 9780124343702
  • ISBN10: 0124343708

Self-Checking and Fault-Tolerant Digital Design

by Parag K. Lala

  • List Price: $115.00
  • Binding: Hardcover
  • Publisher: Academic Pr
  • Publish date: 06/01/2000
  • ISBN: 9780124343702
  • ISBN10: 0124343708
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Returnable at the third party seller's discretion and may come without consumable supplements like access codes, CD's, or workbooks.
Description: Chip designers are packing more and more transistors on a chip, increasing not only chip power and performance, but also the potential for errors at the signal level. As a result, a whole set of fault tolerance techniques have been developed for designing circuits so that they detect and either mask or recover from faults which result from these errors. Self-checking circuits are an important part of creating a fault tolerant system.

Written by a leading researcher in self-checking circuit design, this book examines all the major techniques for hardware fault tolerance and presents the most comprehensive coverage available on techniques for implementing self-checking circuits, providing a uniquely valuable reference for today's practicing designers.

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Sewn binding. Cloth over boards. 400 p. The Morgan Kaufmann Computer Architecture and Design.
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Sewn binding. Cloth over boards. 400 p. The Morgan Kaufmann Computer Architecture and Design.
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Sewn binding. Cloth over boards. 400 p. The Morgan Kaufmann Computer Architecture and Design.
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